In a semiconductor integrated circuit to be used for a sense amplifier of a semiconductor storage device or the like, a P-type semiconductor region and an N-type semiconductor region are sometimes located to be adjacent in parallel to each other on a surface of a semiconductor substrate. For example, N-MOS (Metal-Oxide-Semiconductor) transistors are provided in the P-type semiconductor region and P-MOS transistors are provided in the N-type semiconductor region. In some cases, substrate bias contacts are provided in the P-type semiconductor region and the N-type semiconductor region along a boundary between these semiconductor regions to apply a substrate bias potential to the N-MOS transistors or the P-MOS transistors.
The substrate bias contacts are arranged to apply a sufficient substrate bias potential to all the transistors. Therefore, a sufficient number of the substrate bias contacts need to be arranged for each of the P-type semiconductor region and the N-type semiconductor region in a sufficient range with respect to each of the semiconductor regions. Accordingly, when the substrate bias contacts are arranged in a boundary portion between the P-type semiconductor region and the N-type semiconductor region, the width of a space between transistors placed across the boundary portion needs to be large to ensure a place for the substrate bias contacts, which leads to an increase in the semiconductor chip area and an increase in the manufacturing cost.